In this age of electronics, computers are being used with increasing frequency and for much more complex duties than ever before. In order for computers to perform these complex duties, the internal hardware of the computers has also become more complex. This increased complexity of the internal hardware has dramatically increased the need for state of the art equipment design, in which packaging and interconnection are important consideration.
There are numerous interconnection systems which are known and used in the computer industry. An an example of such a system is described in U.S. patent application, Ser. No. 128,000 filed on Dec. 2, 1987. This application discloses a card cage assembly which has a mother board, daughter boards, and baby boards positioned therein. In order for the card cage assembly to operate, the components provided on any given daughter board must be able to communicate with respective components on other daughter boards. This requires that the components of the various daughter boards be electrically connected with each other, so that the signal transmission may cooperate with the respective components. This type of electrical interconnection is provided through the mother board or back plane of the card cage assembly. However the use of a back plane, with its limited space, can increase the length of the electrical pathways over which the signal transmissions must travel. Consequently, respective signal must travel long distances in order for the various components to communicate. This is an unacceptable result in applications in which high speed communication is required between the components of the computer.
Another problem associated with the increased complexity of the internal hardware is the space required for the hardware. Therefore, as the computer industry continues to expand, several attempts have been made to provide a system which utilizes high density packaging. One such packaging scheme was devised by Texas Instruments. This 3-D packaging scheme puts multiple DRAM chips in a small housing in order to achieve high-density memory. Another packaging scheme utilizes molded wiring boards, which allows for 3-D molded circuit boards. However, molding of 3-D circuit boards is a complicated and relatively expensive process.
An alternative packaging scheme is advanced by Bell Communications Research. In this arrangement, the daughter cards are provided in a three-dimensional configuration which utilizes orthogonal edge-to-edge topology. One edge of each vertically positioned first card intersects an edge of every horizontal second card. Thus, the interconnection across the common edge-to-edge midplane (printed circuit card) is simple and short. The midplane also serves to distribute power and ground signal to the daughter cards. However, this configuration has problems associated therewith. First, the use of a midplane can be expensive. Second, delivering the power and ground through the midplane can occupy pins which could be used for signal paths, resulting in the need for more interconnections in order to accommodate the signal path requirements. And third, the configuration of the circuit paths provided in the midplane are dictated by the real estate requirements of the midplane. Consequently, path lengths may be longer than are required.
Therefore, there is a need in the industry to provide a viable, inexpensive system to interconnect printed circuit boards of the computers using minimal space and providing short signal paths in order to minimize the delay time.